Many system functions require a variable voltage reference to act as a threshold for a comparator or a latch to discriminate a time varying signal. One such system function is a serializer and deserializer (serdes). In one example, a parallel data path is encoded into a serialized data stream for transmission across a cable, or a circuit card, to an another chip or chips. In a receiver chip, the serialized data stream is received and decoded into a parallel data path. The serialization and deserialization process may use one or multiple variable voltage references in each serdes circuit to improve the accuracy of data acquisition to account for environmental effects, such as quality of connections, noise, temperature, and the like. With multiple serdes channels, the implementation cost and power associated with the components becomes increasingly important.
In one approach to providing multiple variable voltages, each time a voltage reference was needed a separate voltage reference circuit was implemented. Each voltage reference circuit typically used a feedback control circuit to generate the reference voltage and a relatively large bypass capacitor for the reference voltage. If a system function required two or more voltage references then two or more independent voltage reference circuits would be used. These independent voltage reference circuits would not track each other and could have different sources of errors, such as different offset errors generated from the independent feedback control circuits used. If the two or more voltage references needed to track each other, then more complex designs and more stringent component matching would be used.